The Senior IC Layout Designer will work with IC Design Engineers in 3 design sites, including USA, UK, and Switzerland, to implement circuit schematics in the physical layout. This role will work with technology engineers to implement circuit components such as transistors, resistors, capacitors, and test structures in the physical layout. In addition, this individual will verify the completed physical layout using CAD tools such as Cadence Layout and Schematic editor and Mentor Calibre DRC and LVS. Carry out all necessary tasks in preparing and taping out verified layout database to mask shop.

RequirementsBSEE preferred IC layout certification required A minimum of 5 years of IC layout experience, preferably in analog or mixed-mode IC layout design