Position Summary
(Job Description Summary) Position SummarySamsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!
Role and Responsibilities
(Job Description) Role and Responsibilities
Research, design, develop, test and/or optimize operating systems-level software, compilers, and/or network distribution software for use in products and/or in manufacturing operations of products for electronic communications industry. Interact with internal engineering teams for Logic Designers, STA engineers, and custom block engineers. Play a key role in producing RTL/Netlist to GDS flow and delivering high quality final database design. Responsible for hands-on physical integration from Netlist to GDS delivery. Perform floorplan, place and route in chip-level hierarchical layout environment. Provide technical leadership for physical integration team by following Samsung’s best known practices. Support signoff tasks including full chip timing closure, power integrity, signal integrity, and layout signoff flow in physical design and layout team. Develop physical design/integration flows for high performance and low-power GPU development. Communicate with other internal engineering teams to discuss the process technology and design methodology.Skills and Qualifications
Skills And Qualifications
Master's Degree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field and 36 months in Job offered or in a related occupation.Requires 36 months of experience involving the following:1. Physical design flow including gate level netlist, floor planning, partitioning, power planning, placement, synthesis, and/or routing;
2. Design closure (DRC/LVS); and
3. Reviewing equipment designs.
Total Rewards
At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $155330 to $175330 per year. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location.
Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.
Additionally, this role might be eligible to participate in long term incentive plan and relocation.
U.S. Export Control
This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.
Trade Secrets
By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.
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