**Please Note:** **1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)** **2. If you already have a Candidate Account, please Sign-In before you apply.** **Job Description:** + The engineer will be responsible for a variety of advanced design and verification tasks such as: design of complex functions, verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random & directed test cases against the specification. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. + The engineer must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification. + Fluent knowledge of RTL verification methodologies including System Verilog. + Strong experience in the Synthesis, DFT, CDC and ATPG. + Strong experience in ASIC design verification flows and DV methodologies + Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Tcl/Perl/Python, and scripting skills. + Strong and independent design debugging capability. + Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members. + Demonstrated ability to analyze and resolve complex verification trade-off scenarios. + Experience with hardware design and debug, C++ and other programming languages are a strong plus. + Familiarity with overall chip design methodologies and tools Experience : Bachelor's and 12+ years of related experience **Additional Job Description:** **Compensation and Benefits** The annual base salary range for this position is $127,000 - $203,000 This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. **Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.** **If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.** Welcome! Thank you for your interest in Broadcom! We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions. For more information please visit our video library (http://www.broadcom.com/videos) and check out our Connected by Broadcom (https://www.broadcom.com/support/resources/video-webinar-library?channel=5c9658f7c1d34eca91c6cc16178e5b1b&video=7d72b04ea50046a394e682fab640ce20) series. Follow us on Linked In Broadcom Inc (https://www.linkedin.com/company/broadcom) .