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Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.
Key ResponsibilitiesWorking on 7nm, 5nm and 4nm designs with various customers for deployment of Aprisa place and route toolsExpertise in solving customer's problems for critical designs to achieve desired performance, area and power targetsResponsible to develop flow and methodology for doing placement, CTS and routing.Provide training and technical support to customers using Aprisa toolsQualificationsTypically requires minimum of 10+ years of experience in Physical Design with mainstream P&R toolsHands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designsHands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-lnnovus or Aprisa is a must. Tapeout experience of 2 or more projects is a mustGood understanding of timing, power and area trade-offsAbility to pickup new flows, learn on the job and influence QOR is a mustExperience delivering designs with multiple voltage islands and top-level floorplanning & chip-assembly is a plusTCL, Perl or Python scripting is a plusStrong verbal and written communication skills; good presentation skillsGood problem solving and debugging skillsBS/B.Tech in Electronics and Communication (E&C) or Electrical or Telecom EngineeringMS/M.Tech in VLSI or Microelectronics is a plus#LI-EDA#LI-Hybrid